Medical Electronics Manufacturing Fall 1999
EMBEDDED SYSTEMS
Embedded Digital Technology Defines the Next Generation of Medical Electronics
Advances in digital signal processors and microcontrollers have increased the opportunities for integrating this technology into medical electronics.
Sam Saba
Digital technology has made big strides this past decade. Digital signal processing (DSP) has been one of the catalysts behind the digital revolution, and DSP-based products have been very successful in several applications. Initial success in the communications world was achieved with signal processing. The need for processing power on silicon has been growing, and the cost of DSP cores that offer that processing power has decreased for low-end use. DSPs now compete with the high-end cpus and microcontroller units (MCUs).
Microelectronics has advanced to the point where every cpu core has been designed with on-chip memory and peripherals, marking the dawn of the embedded world, with custom and general-purpose embedded silicon paving the way for the creation of many new products. New to this class of embedded silicon is the DSP with MCU and reduced instruction set computing (RISC) features or cores. DSP techniques have matured and are now available with MCUs as modules-to-go to meet the needs of a rapidly advancing market.
This article presents an overview of DSP techniques and the emerging DSP controllers, and discusses the signal-processing concepts and fundamentals that comprise DSP applications. It will also address DSP controllers and architectural improvements in the cpu core, and the opportunities for developing medical electronics products.
DSP Techniques
For decades, signal processing has been in analog form. Microprocessors have taken signal processing into the digital domain. Signal-processing techniques are still fundamental to the manipulation of real-world signals. When these signals are processed in digital hardware, however, the techniques have to be transformed for digital implementation. Real-world signals are analog in nature, and digital systems process these signals in a sampled environment. Digital systems apply unique sampling techniques to maintain the integrity of the real signals. Digital algorithms that work on the sampled signals should execute quickly and meet real-time constraints before converting these digital signals back into their analog form. Figure 1 explains the basic building blocks needed to apply signal-processing techniques inside the digital hardware.
Figure 1. Digital signal processing system.
Number System. Signals exist in infinite and continuous form, but the tools that process them are finite and lack resolution. Digital computation has finite precision, resulting in the approximation of parameters. DSPs have specialized digital architectures to handle finite number precision. Two classes of DSPs—floating-point and fixed-point—are popular because of their inherent numerical precision. Fixed-point DSPs offer limited precision compared with their floating-point counterparts. Within these finite-precision DSPs, a fixed-point architecture provides economical and fast application capabilities.
Finite-length arithmetic is any arithmetic with fixed or limited precision. Both floating-point and fixed-point formats are considered finite-length. Floating-point software and hardware set the numerical size without much intervention from a programmer. To work with the finite precision power of the fixed-point formats, programmers need to note each numerical operation to avoid overflow and truncation of the fractional portion of the number. Generally, DSP families have a 16-bit data word, and this word resolution is great enough for most real-world problems.
Fixed-point arithmetic is defined by Q formats. For example, the Q15 (1.15) format is a popular format in which the most significant bit is the sign bit followed by an imaginary binary or hexadecimal point, followed by 15 bits of fraction or mantissa normalized to 1. The Q15 number has a decimal range between –1 and 0.9999 (0 x 8000h to 0 x 7FFFh). The Q15 format fraction can also be expressed in a compact form, as shown in Figure 2.
Figure 2. Compact expression for Q15 numbers.
Addition and subtraction using Q15 numbers is simple using digital hardware. Multiplication in digital hardware, however, requires special understanding. When two 16-bit numbers are multiplied, the product is a 32-bit number. If the input formats of the numbers are X, Y and W, Z, the product has the format (X+Y) (W+Z) (Figure 3). A product of two Q15 (1.15) numbers would give a Q30 (2.30) number with 2 sign bits and 30 bits of fraction. Because the second sign bit is redundant, the Q30 result should remain shifted by one bit. The result will be Q31 (1.31), and the final result will be in the upper 15 bits of the product.
Figure 3. Multiplication using Q format numbers.
Filtering. Signals in the real world exist in analog form, and they are always a composite signal with known and unknown elements. For example, the voice on a telephone line is a mix of far-end speaker voice with communication noise and background noise. During voice generation, background signals and communication channel noise mix in the acoustic environment. The near-end listener should filter the dominant voice to carry on with the conversation. This example shows that the telephone filters most of the channel noise and leaves it to the human system to filter and decipher the voice. Therefore, filtering is a fundamental signal-processing technique to extract the required signals from their native form. Filtering can be perceived as attenuation and enhancement of signals depending on the application.
All of the analog filtering techniques—low-pass, high-pass, band-pass, and band-stop—can be implemented in the digital domain if the signals are sampled correctly. These signal samples are then sent through digital filter structures to accomplish filtering. Digital filters are broadly classified as finite impulse response (FIR) and infinite impulse response (IIR) filters. Each of these digital methods can perform analog-filter equivalents. Inherent characteristics in these techniques, however, limit the selection of these methods in any given application.1
Figure 4. Linear system model.
The mathematical model in Figure 4 explains how time-domain signals and sampled signals are analyzed. This model represents a linear system and provides a compact relationship to the input, output, and system-transfer functions. In the case of digital filtering, the transfer function would represent the FIR or IIR filter model. The transformed output signal can be expressed as a difference equation to facilitate digital-hardware implementation.
Figure 5. FIR filter structure
FIR and IIR filter structures are fundamental to implementing filtering functions in digital hardware. Figure 5 shows the signal flowchart for implementing FIR filters. Digital implementation of filters uses the hardware features in DSPs. Filter algorithms can be implemented using data-move instructions or circular addressing. Both of these methods define ways to maintain past data samples continuously and to aid real-time filter operation. A similar structure for IIR filters can also be expressed for digital implementation.2
Frequency Analysis. Digital filters operate on time-domain samples of analog signals. The filter modifies the frequency content of the input signal. The time-domain samples consist of many different frequencies. To analyze the frequency response of the filter, it is essential to use mathematical tools to transform signals from time to frequency domain and vice versa. Fourier transform is a classic method for analyzing the frequency content of the input signals. These transform equations operate on continuous time-domain waveforms. For digital implementation, these equations have been converted to discrete Fourier transforms. The equations shown in Figure 6 represent the Fourier transform pair for digital implementation.2
Figure 6. Discrete Fourier transform pair.
Adaptive Filtering. A digital filter model is characterized by filter coefficients, which define the behavior of the filter. These filter coefficients are generated using filter equations defined for the required applications. Filter design software tools provide design assistance to generate a digital filter structure and its coefficients. Alternatively, the filter-difference equation can be used to estimate the coefficients if the input and desired signals of the system are known. The coefficients of the filter model can be estimated using adaptive filter techniques. The least mean square model is a simple method that is widely used to adaptively tune filter coefficients. Figure 7 illustrates an adaptive filter structure and the I/O relationship useful for constructing adaptive filters in digital hardware.
Figure 7. Adaptive filter model.
Emerging Embedded Applications
Advances in microcontroller technology have led to the growth of embedded applications. Miniaturized silicon, with DSPs and highly integrated peripherals, has pushed applications from desktop to palmtop. Emerging embedded applications are now using such advances to develop new products in markets such as medical electronics and digital control systems.
Today's medical equipment market includes smart hearing aids, advanced medical imaging devices, and sophisticated wheelchair applications that integrate embedded systems. Each of these applications requires high precision and fast processing to make a viable product. Advanced control and monitoring algorithms based on signal processing, neural networks, and image compression use extensive number-crunching sequences to estimate the mathematical models needed for such applications. Highly integrated silicon is ideal for harnessing these concepts. DSP controllers are an ideal development platform to implement real-time number-crunching algorithms and interactive peripherals in medical electronics.
Control systems theory has been widely researched. Although many sophisticated control algorithms have been published, none have been implemented in digital hardware. These motion-control systems need DSP-intensive architecture to provide the required processing power at a lower cost. Implementing identifiers and self-tuning regulators is now affordable with DSPs. Even the classic PID controller requires multiply-and-accumulate operations in consecutive loops. New robust controllers are being designed that support trajectory estimate, position, velocity-loop closure, commutation, and current-loop closure. Adaptive controllers provide reliable and accurate performance throughout the control mechanism's life by adjusting to age-induced mechanical variations. Adaptive and observer control algorithms eliminate sensor and sensor-interface electronics and reduce system costs significantly.3
Figure 8. Embedded DSP controller feature set.
Signal-processing techniques have moved from basic signal analysis and filtering to advanced sets of algorithms. Using digital hardware, some of these algorithms provide an efficient solution to problems with correlation, data modulation, data encryption, multirate filtering, speech compression, and image compression (Figure 8).
Traditional DSP cores feature higher levels of integration to address control applications, whereas traditional MCU cores have begun to include more capabilities of DSPs. The DSP and MCU worlds are embracing each other as new applications are emerging. DSP techniques are becoming more popular with engineers as knowledge-based tools are becoming prevalent. Design engineers are expecting friendly architectures that will handle both worlds.
Many design engineers are currently exploring three different solutions—MCU with DSP, RISC with DSP, and unified architecture—to meet various application requirements. Although the first two types are already being used, designers are expecting a unified platform that will lower system costs and run at lower power. More importantly, the unified platform is expected to provide easy code development for control and signal-processing solutions.
The merging of MCU and DSP functions creates the basis for a hybrid cpu core specification. The hybrid core specifications along with powerful peripherals form a DSP controller suitable for most embedded applications. A look at the salient features of MCUs and DSPs illustrates the need for a unified architecture.
MCUs
Large Address Reach Beyond 64K. MCUs operate on a large code base, generally developed with high-level languages. A large address reach provides several memory management schemes to map code, data, and peripherals.
Fast Response to Multiple Interrupts and Context-Saving Options. MCU designs handle multiple interrupts, which occur asynchronously and need to be serviced quickly. Interrupt latency and context saving should be quick, preferably in hardware, to manage system performance.
Ease of Programming with High-Level Languages. Software developers often program MCU cores, which require the code base to be in high-level languages. In addition to handling a large code base, high-level language allows for easy maintenance and transportability.
Reliable Debug Environment. Code development under real-time interrupts is very time-consuming. A debug environment should provide visibility to interrupts and code without stopping the cpu. A range of custom and general-purpose tools is required to accomplish real-time debugging.
Highly Efficient in Logic and Integer Operations. MCU architecture is inherently friendly for handling logic and integer operations. Fractional math is implemented using algorithms that work on the basic instruction set.
DSPs
Pipeline Architecture. DSPs have multiple buses to do multiple tasks in a single cycle. Pipeline architecture helps to stage the address and data for successive cycles. Loading the on-chip resources efficiently enhances system performance.
Single-Cycle Multiply and Accumulate. A multiply-and-accumulate operation is a critical feature for the DSP core to implement signal-processing algorithms. A single-cycle multiply-and-accumulate operation using two data operands enables fast number crunching. DSPs provide a multiply-and-accumulate operation as an inherent design feature.
Harvard Architecture. Separate program and data buses remove instruction fetch conflicts. These two buses can feed the DSP core with the continuous data essential to implementing signal-processing algorithms. A typical DSP bus has two read buses and one write bus, which enable the DSP core to fetch an instruction and a datum in a single cycle, and also to write in that cycle.
Circular and Bit-Reversed Addressing. DSP algorithms require two special addressing schemes. Circular addressing is an efficient way to maintain a delay line. Delay lines are necessary to implement digital filter structures. Signal-processing algorithms work on frequency domain analysis, and they require bit-reversed addressing. Architectures without these hardware-addressing schemes require additional cycle overhead, which sacrifices system performance.
Special Instructions. Signal processing is done on fractional numbers, and, while performing calculations, there are intermediate values that must be corrected with saturation logic to avoid overflow and underflow. DSPs have a special set of instructions to implement fractional arithmetic and saturation operation on the fly.
DSP and Microcontroller Peripherals
DSP controllers should be supported with powerful peripherals and development tools to reduce the product development cycle and system costs.
Watchdog Timer. Almost all of the control applications have many interrupt-driven loops to monitor critical activities, which require watchdog timers for failure recovery. An on-chip watchdog timer is necessary to avoid catastrophic failures.
Event Manager and Timers. Event manager is a composite peripheral set with general-purpose timers, capture units to generate multiple pulse-width modulation (PWM) signals. PWM signals meet a range of applications in motor control and in generic controls.
Synchronous Serial Port. DSP applications require analog I/Os to bring in analog to digital (A/D) signals and send out digital to analog (D/A) signals. This peripheral has special control logic to dynamically change the sampling rate of the analog I/O to meet the real-time processing requirements. A synchronous serial interface is a glueless interface to many voice and audio CODECs (COder and DECoder).
Serial Peripheral Interface. An industry standard synchronous serial interface to address a variety of peripherals, A/D, D/A, displays, etc.
Asynchronous Serial Port (UART/ SCI). Host communication is simple and fast with UARTs and SCI. They offer a quick and flexible way to communicate with single and multiple hosts and slaves.
Bit I/O. Bit inputs and outputs are indispensable for managing a variety of control signals and peripherals. The more I/O, the better it is to interface peripherals such as the keypad to displays.
Control Area Network (CAN). CAN is a serial communication standard that works in harsh environments to provide reliable serial communication up to 1 Mb/sec.
Next-Generation Peripherals. The industry has several new-generation peripherals such as universal serial bus (USB), fire wire (1394), and many more. Adapting to these peripherals is important to provide device compatibility.
Real-Time Debug Environment. DSP controllers handle algorithms under time-constrained interrupts. Code development requires visibility to DSP algorithms and real-time interrupts. The debug environment should provide a unified user interface to go between these functions. Tools are beginning to include a debug environment with graphical interface and code visibility in real time. A real-time interface requires a fast data export from the core without stopping the system. Pipelined architecture facilitates such data export using high-speed joint test action group (JTAG) scan logic.
Conclusion
DSP controllers offer highly integrated silicon with special peripherals and a powerful engine. The emerging control market is rife with many generations of DSP controllers.1,4,5 Design engineers can take advantage of the integration of DSPs and MCUs to develop unique medical products.
References
1. Jim Turley, "Microcontrollers and DSPs Slowly Merging," Communication Systems Design 13, no. 11 (1997).
2. Craig Marvin and Gillian Ewers, A Simple Approach to Digital Signal Processing (1996).
3. Ray Weiss, "DSPs Wrestle with Cpus in the Embedded Arena," Computer Design 32, no. 4 (1996).
4. Markus Levy, "DSP Architecture Directory," EDN's 24th Annual Microprocessor/Microcontroller Directory (1997).
5. "The EDN Focus Series on Sampling the DSP Spectrum," EDN, March 13, 1998.
Sam Saba is DSP applications engineer for Texas Instruments (Houston).
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