Ensuring Solder Joint Integrity

John M. Radman

With the popularization of surface-mount technology in electronics, typical circuit boards are now much thinner and more densely populated than ever before. These changes have made reliable, accurate soldering even more difficult.

Surface-mount boards, which have small spacings and pad widths, can accommodate only very narrow solder dams, the areas between pads filled with solder mask, and solder wells, the areas surrounding the pads that are devoid of solder mask. Thus, accurate solder mask application and registration is more difficult. Also, as the pad width narrows, the allowable solder thickness decreases proportionally. Soldering the bare printed circuit boards accurately within these parameters is difficult.

A thermal shock chamber exposes printed circuit assemblies and components to temperature extremes of -100° to 200°C to identify premature solder joint failures and weak solder joints. Photo courtesy of Trace Laboratories East, Hunt Valley, MD.

Because surface-mount boards are thin, they provide little thermal insulation. Lack of insulation combined with dense circuitry can cause excessive heat to be generated during the infrared (IR) reflow required for assembly. This can threaten solder joint integrity.

How Integrity Is Compromised

Tin-lead solders are still the most widely used joint materials in the electronics industry. Chemical reactions are necessary for these solders to bond to copper, and the reactions cause copper-tin intermetallic compounds (IMCs) to form. Although these IMCs are essential for proper bonding, there has long been evidence that they are also the cause of solderability problems.

During soldering, two IMCs are formed as by-products of tin, copper, heat, and time. The compounds are Cu₆Sn₅ and Cu₃Sn.

Cu₆Sn₅ is the first to form and does so the instant that the molten tin-lead comes in contact with the copper pad. The compound exhibits a rapid early growth, which slows sharply once the metals solidify. The presence of Cu₆Sn₅ is essential for good solder adhesion to the copper pad.

The second compound, Cu₃Sn, forms between the first IMC and the copper pad. This compound does not form while the solder is molten; it forms through solid-state diffusion once the metals have hardened. At high temperatures, such as bake or reflow temperatures, Cu₃Sn will form once the existing tin is depleted during the creation of Cu₆Sn₅. Cu₃Sn, which is composed primarily of copper, is unsolderable but will not inhibit wetting provided that it is covered by a layer of Cu₆Sn₅.

Both IMCs will continue to grow thicker when they are exposed to heat, as they are during assembly. If the solder coat on the board is too thin, the IMC layers may actually consume the solder, and if not resoldered promptly, they may become exposed. Exposed IMCs have a propensity for rapid oxidation; once oxidized, they will inhibit wetting of the pads. Long-term storage of the boards may also cause exposure of the IMC layers, as they can continue to grow via solid-state diffusion.

As the IMCs grow, they deplete the amount of tin in the solder, producing a lead-rich area, which also contributes to poor solderability (see Figure 1 below).

Thus, the ratio of intermetallic thickness to total solder thickness is critical for the shelf life of a board. The higher the ratio, the shorter the time until the intermetallics grow through the solder. If the ratio is as much as 1:2, the percentage of tin in the remaining solder is likely to be reduced over time by more than 20%.¹ This reduction would have an adverse effect on solderability even if the intermetallic is not exposed.

Figure I. When the molten tin-lead contacts the copper pad, IMC layers form. If these layers become too thick, they can actually consume the solder material.

Not only do IMCs affect solderability, but they are also extremely brittle and have coefficients of thermal expansion that differ from those of the surrounding tin-lead and copper. As the IMC layers grow, the joint becomes more susceptible to cracking due to external stresses, such as temperature and vibration.

There are two main processing phases during which solder joint integrity can be compromised: bare-board processing and solder reflow for assembly.

Bare-Board Processing

The goal of bare-board processing is to ensure that the board will be ready for soldering, or wetting, during the assembly phase. Some little-known factors that can affect solderability during assembly are the height and placement, or registration, of the solder mask.

Studies have shown that there is a direct correlation between the height of the solder dam and the degree of solderability defects. Solder dams that are higher than the copper surface-mount pads can produce nonwetting during bare-board hot-air solder leveling (HASL), the process in which heat and airflow are used to evenly distribute the solder. ² For example, observation of numerous bare printed circuit boards showed that in all cases the ratio of solder mask thickness to copper pad thickness had a direct affect on solder joint failure.

The boards that were observed were either solely surface mount or of mixed surface-mount and through-hole technologies. All were of differing design, material types, solder mask types, manufacturers, and date codes. However, all were coated with either dry film solder mask or two coats of liquid mask; both of these tend to be quite thick.

The observations also indicated that boards with high solder dams that did not exhibit nonwetting after HASL may still be suspect. Even when proper wetting seemed to occur and the boards appeared acceptable, they often were not. Metallographic inspection demonstrated an erratic solder coat atop the surface-mount pads; in many cases, isolated areas of extremely thin solder coverage were detected and exposed intermetallic was observed.

Also, solder mask misregistration seemed to be linked to solder dam height on all problem boards. On these boards, registration was only barely acceptable. Though the boards did not exhibit bleeding of the mask onto the pads, the mask clearance was greatly narrowed in one or two directions.

When the dam height was greater than that of the copper pad and the mask was very close to the pad, solder coverage throughout the board was erratic. In many areas of the boards with these conditions, the solder was thick enough to cover the intermetallic and ensure wetting during soldering, but there were an equal number of areas in which the intermetallic was exposed.

During HASL, the direction of the airflow in relation to the misregistration of the mask produced differing solderability effects. When the airflow originated from the side of the board with the narrowest mask clearance, or well, misregistration was greatest. Typically, this airflow created very thin solder coverage over most of the pad with a small ridge on the opposite end.

When the airflow direction was reversed, a thicker solder coat resulted. The pads tended to collect more solder on the side of the narrow well. Surface tension then caused some solder to flow back over the remaining portions of the pad when it was removed from the air path.

Choosing an appropriate solder mask and applying it carefully can help ensure proper solderability and strong solder joints. During design, consideration must be given to the surface-mount pad thickness before a specific solder mask is chosen. During production, tighter controls may be needed to ensure acceptable solder-mask registration.

Assembly Processing

During the assembly processing phase, the printed circuit board is heated in an IR oven to cause the solder paste to become molten, binding components to the board. The heat generated during this stage can affect the integrity of the solder joint.

Observation of several boards showed that relatively thin, densely populated boards with narrow pad widths and spacings were most susceptible to a loss of joint integrity. The thinner circuit boards allowed more heat transfer during IR reflow, and the more densely populated boards allowed more heat to accumulate in isolated areas. All boards were assembled with an adhesive and solder paste application followed by component placement. The solder paste was then reflowed. During the bare-board stage, the boards had demonstrated acceptable solderability under industry standard tests such as those specified in ANSI-J-STD-003; however, under assembly conditions they did not exhibit acceptable wetting.

The top sides of these boards, which were soldered first, did not exhibit anomalies, but dewetting was noted on the bottom sides. The intense heat generated by the IR oven was sufficient to reflow the HASL surface on the opposite side of the boards. IMCs grow quickly when the overlying solder is molten, and during the reflow of the top side, the IMCs on the bottom side began a second rapid growth.

In all cases, the IMC-to-solder ratios on the bare boards had been quite high (greater than 1:2), which is common for boards that have narrow pad widths and spacings. However, the IMC layers on the bare boards had not yet been exposed and were covered with a thin layer of solder.

The already high ratio increased as the IMC layers continued to consume solder while the metals slowly cooled. After exposure, the IMCs oxidized and prevented proper wetting of the solder paste on the bottom of the board.

Assemblers must analyze their reflow temperatures and better understand board design to prevent this condition from occurring. Dissimilar board styles will behave differently during processing. Although one general solution does not exist, it is possible that lower reflow energies may be sufficient to solder the top side without undermining the integrity of the bottom side.

Conclusion

As surface-mount technology gets smaller and more intricate, the need to tightly control all manufacturing and assembly processes becomes more important. Slight variations that may have been acceptable under older technologies prove unacceptable under the new conditions. A designer must consider the thickness and accuracy of the solder mask and the amount of heat likely to be generated during assembly to ensure that the joints perform adequately.

References

1. Hagge J, and Davis G, "Aging Solder Thickness and Solder Alloy Effects on Circuit Board Solderability," PC Fab, pp 14-36, October, 1984.

2. McGregor D, Hull R Jr., and Petersen R, "Solder Mask and SMT Solderability," PC Fab, pp 30-37, December, 1992.

John M. Radman is the technical director at Trace Laboratories East (Hunt Valley, MD, and Denver, CO). Scott S. Opperhauser, vice president, and Denise Burdyck, staff analyst at Trace Laboratories East (Hunt Valley, MD) provided technical assistance for this article.