MINIATURIZATION

(click to enlarge) A magnified view of gold stud bumps that ensure adequate flip-chip bonding.

Implantable neurostimulation units, for example, have many functions that are electrical in nature. Typically, the devices send programmable electrical pulses via special medical wires to nerves that control pain, muscles, and organs.

As the use of neurostimulation devices gains momentum, consumers and medical professionals are demanding that implantable units be made smaller without sacrificing performance.

Such devices require that circuitry be minimized, so that the device itself can be made smaller and more easily implantable or so that more features and capabilities can be added to an existing device. While market demands push devices to an even smaller size, manufacturers of these devices must keep in mind the need to make them reproducible and reliable.

Classic reliable miniaturization techniques include the use of surface-mount devices (SMDs) on the top and bottom of a printed circuit board (PCB) instead of the use of through-hole components with packaged parts. However, these methods are no longer sufficient to meet the tiny size requirements. Instead, new techniques now take advantage of discrete components and the small size of semiconductor chips.

Substantial developments in electronic miniaturization have taken place over the past several years, particularly in advances that have made it possible to shrink circuitry. Design innovations have enabled components to be reduced to the size of sand grains, making them so minute that they must be assembled by robots. Not only are these microscopic circuits more complex, but they are also more reliable and have much lower energy needs. Best of all, these techniques have proven to be practical in a manufacturing environment and have enabled medical device companies to reduce the size of their devices at a greater scale than ever before.

Miniature Circuit Assembly

Many advances in miniature circuit assembly technologies are the result of working with a bare die, or semiconductor chip. Although its circuitry is very tiny, the chip traditionally was put into a large package, negating the gains achieved through the circuit's small size. This larger packaging was needed to accommodate the manufacturing methods in widespread use in electronic assembly fabrication facilities.

There are several ways to affix a bare die directly to a circuit board and thus eliminate the packaging. All methods require implementing production equipment such as a gold ball wire bonder or a flip-chip system that is capable of attaching bare die. It is essential to qualify any processes used for temperature and vibration variations. Employing these bare die–attachment techniques allows for up to 20 times the amount of circuitry to be placed in space traditionally taken up by large packaging.

Miniaturization is the result of adapted chip-on-board (COB) technology followed by chip-on-chip (COC) technology. These processes use a circuit board and fine wires to configure increasingly compact circuitry.

COB and COC designs marked a noteworthy advance in the field, saving up to 50% of the space required to make the same circuit in a conventional manner. But engineers saw that despite their advantages, the new techniques still had limitations. One limitation was the need to bond the wires from the chips to the circuit board. Doing so took up too much space and did not meet the size requirements being demanded by their customers. And with COC configurations, the top chip had to be smaller than the bottom one.

Engineers used the flip-chip process to solve problems inherent to COB and COC. In flip-chip configurations, a chip is mounted face down onto a circuit board, instead of face up as in the COB and COC techniques. Solder or adhesives are used for bonding. Adding to the usefulness of the flip-chip process is the fact that contact pads can be distributed over the chip's entire surface, not just the edge, which enables the chip to hold more input and output contacts. The flip-chip process allows for an assembly that consumes less power, operates at lower temperatures, and offers increased reliability.

3-D Chip-Scale Packaging

Yet another important gain in circuit assembly technology was achieved with the creation of 3-D chip-scale packaging, or 3D-CSP. With this process, considered the ultimate miniaturization technique, several COB or flip-chip circuits are assembled on flexible circuit boards. The boards are then folded or rolled to achieve the compact 3D-CSP package. The system produces a 75–80% size reduction compared with other assemblies, and it preserves all the advantages of the conventional flip-chip configurations previously discussed.

The smallest, most compact assemblies currently possible can be made using 3D-CSP, making it suitable for demanding size requirements such as those of implantable medical electronics. The technology is ideal for developing devices that need to incorporate wireless programming capabilities and a battery, as well as circuitry.

Such devices create challenging placement and layout requirements. There is often insufficient room to place all the components on two sides of a substrate. Therefore, it may be necessary to place two substrates on top of each other to take advantage of low-profile components. With this approach, the effective surface area available for component placement can be doubled. But, rather than placing two individual substrates and connecting them electrically, a folded approach can be taken. A substrate made of Kapton material as one piece, for example, can enable a varying number of layers.

An example of this technique would be creating two main surfaces using six layers of flexible material while the interconnecting area between the main surfaces are made of two layers of the same flexible substrate. The six-layer areas are rigid enough to support the components and provide enough room for routing the signals from the programmer. Just as importantly, the two-layer areas are still flexible enough to allow bending at the desired radius.

The components are placed on the six-layer areas, and the two-layer areas are then folded so that the main areas are facing each other. This approach helps minimize the cost of producing and assembling the device, and at the same time it allows for reliable operation by eliminating a need for separate interconnecting components.

To make sure that components on the inside do not come in contact with each other after bending, a 3-D model of a device can be created, and the vertical spacing between components can be checked for a possible interference.

One of the challenges on the electrical side is to create ground planes that provide good power-supply connections without interfering with the other sections of the assembly. Sensitive circuits and traces that have to be guarded by ground impose another constraint in the layout process. Implementing various connections using strip line methods to achieve optimal circuit performance—especially in the case of an RF circuit—also poses a challenge.

Routing of the high-current pathways is especially critical, because power planes must be avoided. Although it would be easier to use a large power plane to simplify the routing of the power signals, this approach would degrade system performance. By connecting all the supply voltages together on a large plane, it is difficult to keep noise under control. To reduce noise, a star configuration of the power signals can be implemented. This greatly reduces the coupling between various components in the system.

Lastly, for 3D-CSP, both electronic and mechanical considerations must be taken into account. Bending a multilayer board requires attention to the required bend radius, trace thickness, and any component mechanical interference. Further, the package must also be electrically tested; therefore, the PCB is usually built within a frame enabling testing and powered burn-in after assembly. Once testing has been completed, then the assembly is usually folded and encapsulated or folded and mounted into its final package after being cut from its frame.

Flip-Chip Bonding

Other advances include new circuit board technology that incorporates the glued flip-chip process.

Figure 1. (click to enlarge) Cross-section of a flip-chip connection.

Stud bumping is done by machine wire bonding, leaving gold bumps called single ball bumps, or stud bumps, on the die pads. Stud bumping provides great versatility because the process can be carried out on standard wafers containing integrated circuits (ICs) with standard pads, without any additional metallization. Stud bumping is also compatible with individual ICs in waffle packs. This makes them more economical because they can be used with off-the-shelf semiconductor devices (e.g., memories, MPUs, DSPs, ASICs, analog circuits, etc.) for medium production quantities. The adhesive used in the flip-chip process can be applied by screen printing or by other application methods, and it will wet the surfaces without forming bubbles. Consistent application pattern and quantity can be achieved relatively easily.

Prior to joining the die and substrate, the contact pads of both must be aligned to ensure proper contact. When the die is pressed onto the surface of the substrate, the stud bumps are crushed and perfectly adapt to the pads of the substrate, even though the two surfaces may not be perfectly parallel (which is often the case with flexible substrates). At this stage of processing, the assembly can actually be tested electrically to ensure proper contact and functionality of the circuit.

The bonding pressure required for proper crush depends on the input/ output (I/O) count of the die that are to be connected simultaneously. Each bump requires from 50 to 80 g of force. Both sides of the package are then heated to cure the adhesive, which can be done at temperatures low enough to eliminate the possibility of heat damage. Temperatures of approximately 230°C or lower are required for as little as 5 seconds.

Once the adhesive has cured adequately to guarantee strong bonding, both the pressure and heat can be turned off. The curing of the adhesive generates an important shrinkage effect that pulls the die and the substrate against each other, applying a permanent force to each stud bump that guarantees electrical contact will be maintained over the life of the product.

This type of adhesive-based flip chip is known as glued flip chip. It is extremely economical to produce when volumes are less than a few thousand per month. In addition, it is extremely reliable, especially in medical products that undergo dramatic temperature changes.

For example, this is an important consideration for medical implant manufacturers because implants must go through process temperature variations during production, shipping, and delivery to the operating room and then implantation into the body. Therefore, these glued flip chips offer a cost-effective, highly reliable option that also enables a high degree of miniaturization. These characteristics make glued flip chips an ideal alternative for medical products.

Implantables:
Flip Chips in Action

Glued flip chip and stud bumping has been used in developing neurostimulation implants for maladies ranging from urinary incontinence and chronic pain to loss of muscle use. Such devices can be implanted using minimally invasive surgery. After implantation, a clinician can use a wireless programmer to set the stimulus parameter and timing patterns, which both the clinician and patient can use. A biocompatible battery is used to power neurostimulators. These can be recharged from outside the body by a recharging patch worn by the patient.

Patients are increasingly attracted to these neurostimulation therapies because they can often help avoid nonreversible surgery or replace less-effective therapies. Neurostimulation devices enable patients to control the stimulation remotely.

Besides helping many patients sidestep surgery, the units also can diminish or eliminate the need for medication, which is costly and can have troublesome side effects. In addition, implantable neurostimulation devices can help a patient avoid having to undergo long-term and difficult behavior modifications that have been used to address some medical problems.

Conclusion

Some futurists predict that the microminiaturization trend one day will produce nanobots, devices so minuscule they can be injected into the bloodstream to perform vital tasks, including unclogging blocked arteries and attacking tumors.

Whatever comes next, one thing is certain: the demand for implantable devices will grow, and researchers, engineers, and entrepreneurs will continue to seek ways to increase their performance and benefit.

Minimizing circuitry means that devices themselves can be made smaller and be more easily implantable. More features and capabilities can be added. Traditional miniaturization techniques, such as the use of SMD, are no longer sufficient to meet the tiny size requirements. New techniques, including 3D-CSP and flip chip, enable manufacturers to take advantage of discrete components and the small size of semiconductor chips.

Jim Ohneck is marketing and sales director for Valtronic USA (Solon, OH). He can be reached at johneck@valtronic.com