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Originally Published EMDM January/February 2004

INDUSTRY NEWS

Low-Power ICs Deemed Sound Choice for Hearing Aids
Application-specific integrated circuits and a digital signal processor that provide high performance while consuming minimal power have been developed for use in a manufacturer’s line of digital hearing instruments.

A joint effort has led to the development of low-power application-specific integrated circuits (ASICs) that enhance the performance of digital hearing aids. Engineers from Starkey Laboratories (Eden Prairie, MN, USA), a maker of custom hearing instruments, worked with peers at Zarlink Semiconductor (Swindon, Wilts, UK) to design a set of ASICs suited for use in hearing aids. Two mixed-signal ASICs and one digital signal processor (DSP) were produced. The result, according to Steve Swift of Zarlink, is “a multichip platform that sets the stage for further advances.”

The mixed-signal chips are based on 0.35-µm CMOS technology. The coding and decoding ASIC measures 8.8 mm2 and consumes only 600 µA at 1.25 V. The DSP is produced in 0.18-µm CMOS, has a clock rate of 1.5 MHz, and draws less than 150 µA at 1.25 V.

Hearing aids today must deliver high levels of digital functionality, says Starkey vice president of engineering Tom Victorian. They also need to be very small and consume minimal power. The Zarlink chips have helped the company to achieve these goals, he adds. All three Zarlink chips have been integrated into the firm’s behind-the-ear instruments. Its completely-in-the-canal devices use two of the chips. 

For more information, contact Zarlink Semiconductor, Cheney Manor, Swindon, Wilts SN2 2QW, UK; phone: +44 1793 518000; fax: +44 1793 518411; Internet: www.zarlink.com

Norbert Sparrow


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